This will be achieved by exploiting device concepts based on nanoelectromechanical switches (NEMS) initially developed in a predecessor project, ZeroAMP. NEM switches, also called NEM relays, can, from a functional point of view, be seen as the nanomechanical equivalent of a transistor. Depending on a voltage applied to a gate contact a current flow between a source and a drain contact can either be switched on or off. By combining different basic NEM switch designs, this technology can be exploited to realize logic functions as well as volatile and non-volatile memory cells. Hence, the technology enables the integration of elements such as field programmable gate arrays (FPGAs), memory, memory access circuits and other elements such as basic sensors or readout circuitry on a single silicon chip.
While certain NEMS specific process steps are developed, the fabrication process flow for i-EDGE devices will still be very similar to conventional CMOS device manufacturing. This allows the project not only to heavily rely on well-established fabrication techniques such as lithography or dry etching, but also enables the use of commercially available silicon foundry services as part of its integration approach. This not only reduces costs for the fabrication of initial prototypes of the project’s first demonstrators, but also provides a clear path from lab-scale device fabrication by the project consortium to a commercially relevant manufacturing of SoC targeted competitive products. Initially, device fabrication will be shared between UNIVBRIS, KTH and AMO and utilize the infrastructure available to the consortium. At the same time, our process flows are all developed having an easy and smooth transition into a fabless silicon-foundry based manufacturing approach in mind.
